Workshop - Heterogeneous and Unconventional Cluster Architectures and Applications (HUCAA) 2014

HUCAA2014 ( is going to take place in conjunction with ICPP 2014 (, September 12, 2014, Minneapolis, MN, USA.


The workshop on Heterogeneous and Unconventional Cluster Architectures and Applications gears to gather recent work on heterogeneous and unconventional cluster architectures and applications, which might have a big impact on future cluster architectures. This includes any cluster architecture that is not based on the usual commodity components and therefore makes use of some special hard- or software elements, or that is used for very special and unconventional applications. In particular we call for GPUs and other accelerators (Intel MIC/Xeon Phi, FPGA) used at cluster level. Other examples include virtualization, in-memory storage, hard- and software interactions, run-times, databases, and device-to-device communication. We are in particular encouraging work on disruptive approaches, which may show inferior performance today but can already point out their  performance potential. The broad scope of the workshop facilitates submissions on unconventional uses of hardware or software, gearing to gather ideas that are coming to life now and not limiting them except for their context: clusters. Also, these proposals may rather be reflective of a broader industry trend

We are seeking new proposals presented from a holistic perspective. In this regard, one of the aims of the workshop is anticipating the evolution of clusters. Instead of just presenting new work carried out in the traditional cluster areas usually addressed in other conferences and workshops, we are thinking on creating the right atmosphere for a discussion of opportunities in cluster computing. In this regard, contributions would not only be accepted according to their technical merits but also according to their contribution to this discussion.

Topics of Interest

Topics of interest include any heterogeneous or unconventional cluster architecture or application. Examples include, but are not limited to:
  • Clustered GPUs, Xeon Phis or other accelerators
  • Runtimes, resource management and scheduling for heterogeneous clusters
  • Communication methods for distributed or clustered accelerators
  • Energy-aware data movement techniques
  • New industry and technology trends and their potential impact 
  • High-performance, data-intensive, and power-aware computing
  • Application-specific cluster and datacenter architectures
  • Emerging programming paradigms for parallel heterogeneous computing
  • Software cluster-level virtualization for consolidation purposes
  • Hardware techniques for resource aggregation
  • Management layers for large-scale systems
  • New uses of GPUs, FPGAs, and other specialized hardware

Important Dates

  • Paper submission: EXTENDED DEADLINE: April 21th, 2014 April 7th, 2014
  • Notification of acceptance: June 6th, 2014
  • Camera-ready paper: June 15th, 2014
  • Workshop: Sept. 12, 2014

Paper Submission Guidelines

Submissions may not exceed 8 pages (CPS standard double column format, single spaced, 10pt font, 8½×11-inch pages) in PDF format including figures and references. We recommend a minimum of 6 pages. Submitted papers must be original work that has not appeared in and is not under consideration for another conference or journal. Work in progress is welcome, but first results should be made available as a proof of concept. Submissions only consisting of a proposal will be rejected.

Paper submissions will be handled using EDAS:

The papers will be published as part of the ICPP conference proceedings, and will be submitted to the CS Digital Library.



  • Federico Silla, Technical University of Valencia, Spain
  • Holger Fröning, University of Heidelberg, Germany 

Steering Committee

  • José Duato, Technical University of Valencia, Spain
  • Sudhakar Yalamanchili, Georgia Institute of Technology, USA
  • Ulrich Brüning, University of Heidelberg, Germany

Technical Program Committee

    • Elvira Baydal, U. Politécnica Valencia, Spain
    • Bryan Catanzaro, NVIDIA, US
    • Hans Eberle, Oracle, US
    • Norbert Eicker, Jülich Supercomputing Centre, Germany
    • Jesus Escudero, U. Castilla-La Mancha , Spain
    • Pedro Garcia, U. Castilla-La Mancha , Spain
    • Mark Hummel, NVIDIA, US
    • Ben Juurlink, Technical University of Berlin, Germany
    • Heiner Litz, Stanford University, US
    • Rafael Mayo Gual, U. Jaume I, Spain
    • Gaspar Mora, Intel, US
    • Mondrian Nuessle, EXTOLL, Germany
    • Juan Manuel Orduña, U. Valencia, Spain
    • Antonio J. Peña, Argonne National Laboratory, US
    • Samuel Rodrigo, Oracle, Norway
    • Ron Sass, U. North Carolina at Charlotte, US
    • Christian Terboven, RWTH Aachen, Germany
    • Jesper Larsson Traeff, U. Tech. Vienna, Austria
    • Tilman Wolf, U. Massachusetts, US
    • Jeff Young, Georgia Tech, US


    Contact us using either one or preferable both email addresses:

    • Federico Silla, Technical University of Valencia: fsilla {at}
    • Holger Fröning, University of Heidelberg: froening {at}
    Subpages (1): Program