Workshop - Heterogeneous and Unconventional Cluster Architectures and Applications (HUCAA) 2017


The sixth edition of the HUCAA workshop (http://www.hucaa-workshop.org/hucaa2017) is going to take place in conjunction with the 46th International Conference on Parallel Processing (ICPP, http://www.icpp-conf.org/2017/index.php), on August 14, 2017, Bristol, UK.

ABOUT THE WORKSHOP

The workshop on Heterogeneous and Unconventional Cluster Architectures and Applications gears to gather recent work on heterogeneous and unconventional cluster architectures and applications, which might have an impact on future mainstream cluster architectures. This includes any cluster architecture that is not based on the usual commodity components and therefore makes use of some special hard- or software elements, or that is used for special and unconventional applications. In particular we call for GPUs and other accelerators (Intel MIC/Xeon Phi, FPGA) used at cluster level. Even though accelerators are already used pervasively, we still see many unconventional and even disruptive uses of them.

Other examples of unconventional cluster architectures and applications include virtualization, in-memory storage, hard- and software interactions, run-times, databases, and device-to-device communication. We are in particular encouraging work on disruptive approaches, which may show inferior performance today but can already point out their  performance potential. The broad scope of the workshop facilitates submissions on unconventional uses of hardware or software, gearing to gather ideas that are coming to life now and not limiting them except for their context: clusters. Also, these proposals may rather be reflective of a broader industry trend.

We are seeking new proposals presented from a holistic perspective. Also, proposals may rather be reflective of a broader industry trend. In this regard, one of the aims of the workshop is anticipating the evolution of clusters. Instead of just presenting new work carried out in the traditional cluster areas usually addressed in other conferences and workshops, we are thinking on creating the right atmosphere for a discussion of opportunities in cluster computing. In this regard, contributions would not only be accepted according to their technical merits but also according to their contribution to this discussion.

TOPICS OF INTEREST

Topics of interest include any heterogeneous or unconventional cluster architecture or application. Examples include, but are not limited to:

  • Clustered GPUs, Xeon Phis or other accelerators
  • Runtimes, resource management and scheduling for heterogeneous cluster architectures
  • Communication methods for distributed or clustered accelerators
  • Energy-aware data movement techniques
  • Energy efficiency at the cluster or node level
  • New industry and technology trends and their potential impact
  • High-performance, data-intensive, and power-aware computing
  • Application-specific cluster and datacenter architectures
  • Emerging programming paradigms for parallel heterogeneous computing
  • Software cluster-level virtualization for consolidation purposes
  • Hardware techniques for resource aggregation
  • New uses of GPUs, FPGAs, and other specialized hardware

IMPORTANT DATES

  • Paper submission: April 1, 2017 April 16, 2017
  • Notification of acceptance: May 15, 2017
  • Camera-ready paper: May 26, 2017
  • Workshop: August 14, 2017

PAPER SUBMISSION GUIDELINES

Submissions may not exceed 8 pages in PDF format including figures and references, and must be formatted in the 2-column IEEE format. Submitted papers must be original work that has not appeared in and is not under consideration for another conference or journal. Work in progress is welcome, but first results should be made available as a proof of concept. Submissions only consisting of a proposal will be rejected. 

CO-ORGANIZATION

  • Federico Silla, Technical University of Valencia, Spain
  • Holger Fröning, University of Heidelberg, Germany

STEERING COMMITTEE

  • Jose Duato, Technical University of Valencia, Spain
  • Sudhakar Yalamanchili, Georgia Tech, USA
  • Ulrich Brüning, U. Heidelberg, Germany

TECHNICAL PROGRAM COMMITTEE

  • Costas Bekas, IBM Research - Zurich, Switzerland
  • Guoyang Chen, Qualcomm, US
  • Jesus Escudero, University of Castilla-La Mancha, Spain
  • Basilio Fraguela, University of Coruna, Spain
  • Rong Ge, Clemson University, US
  • Benjamin Klenk, Ruprecht-Karls University of Heidelberg, Germany
  • Gaspar Mora Porta, Intel, US
  • Lena Oden, Argonne National Labs, US
  • Dirk Pleiter, Research Center Jülich, Germany                     
  • Lavanya Ramapantulu, National CyberSecurity Laboratory, Singapore
  • Jose Cano Reyes, University of Edinburgh, UK
  • Antonio Robles, Technical University of Valencia, Spain
  • Sébastien Rumley, Columbia University, US
  • Sven-Bodo Scholz, Heriot-Watt University Edinburgh, UK
  • Shuaiwen Leon Song, Pacific Northwest National Lab (PNNL)
  • Carsten Trinitis, Technical University of Munich, Germany
  • Jeff Young, Georgia Tech, US
  • Blesson Varghese, Queen's University Belfast, UK
  • Prudence Wong, University of Liverpool, UK

CONTACT

Contact us using either one or preferable both email addresses:

  • Federico Silla, Technical University of Valencia: fsilla {at} disca.upv.es
  • Holger Fröning, University of Heidelberg: holger.froening {at} ziti.uni-heidelberg.de

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